sar6502 reviews and mentions

• What am I doing wrong?
  1 project | /r/FPGA | 16 Oct 2022

  Before I begin, the code in question if you want to have a look is at https://github.com/CompuSAR/sar6502/tree/sync-mem

• Simulation problem with asynchronous back and forth between two modules (no loop!)
  1 project | /r/FPGA | 5 Mar 2022

  If you're still interested, the code is at https://github.com/CompuSAR/sar6502/tree/reddit_help (that's a branch, as the code isn't ready for master yet). The simulation checks the execution against a memory file that was created by running the exact same code on a real CPU (I describe the setup in this video, if you're interested).