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I can confirm that’s pretty much exactly what happens. I did some digging with the help of m1n1 a while back, and essentially yeah, this is almost exactly what it does. The only difference is that, rather than tracking which cores are running emulated code, the scheduler keeps track of which processes are running in emulation mode, and prior to returning to userland after a context switch, the kernel sets control register bits for features like TSO (which is what I was interested in looking into at the time; I believe that specifically is controlled somewhere in the actlr_el1 register). Although only the P-cores actually implement the necessary x86 emulation behavior, the scheduler of course wants to ensure that a process is not pinned to any one core, and that native and emulated processes alike can preempt and interleave with each other on the P-cores just as they would if there were no emulation.