Clear – The Open Source FPGA ASIC

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  • OpenFPGA

    An Open-source FPGA IP Generator

    • Looks like this has been put together by Efabless themselves. I dont think the rtl would be too different from OpenFPGA(https://github.com/lnis-uofu/OpenFPGA) married to the caravel f/w.

  • MCPU

    MCPU - A Minimal 8Bit CPU in a 32 Macrocell CPLD

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