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Prior notice, I work for a professor and he wants me to test/verify a riscv simulation model, which is programmed in VHDL. He referred to the https://github.com/riscv-non-isa/riscv-arch-test , to look up how I have to set up a test.
To figure out how the environment works, I built a spike model with https://github.com/riscv-software-src/riscv-isa-sim So I tried now to verify the spike model, but I always get the error: "Target simulator executable 'spike' not found." when I use the "make" command.
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