MemPool: Many-core image processor based on RISC-V with Shared L1 cache

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  • mempool

    A 256-RISC-V-core system with low-latency access into shared L1 memory. (by pulp-platform)

    • I don't get it:

    https://github.com/pulp-platform/mempool/blob/main/software/...

    How is that mapping to cores happening? I see indexing by core id for the multiply but how does it magically end up running on a specific core? Magic compiler?

  • WorkOS

    The modern identity platform for B2B SaaS. The APIs are flexible and easy-to-use, supporting authentication, user identity, and complex enterprise features like SSO and SCIM provisioning.

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