wcc
sandsifter
| wcc | sandsifter | |
|---|---|---|
| 4 | 15 | |
| 1,816 | 4,824 | |
| - | - | |
| 2.7 | 0.0 | |
| 7 days ago | 3 months ago | |
| C | Python | |
| GNU General Public License v3.0 or later | BSD 3-clause "New" or "Revised" License |
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wcc
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Shared Libraries as Executables
rundll32.exe is just a way of doing FFI from as a command -- there are few different options on UNIX-likr systems for that. The most obvious is ctypes.sh [0].
There are, though, even more sophisticated options than just FFI, like the Witchcraft Compiler Collection [1], which includes among other things an interactive shell.
[0] https://github.com/taviso/ctypes.sh
[1] https://github.com/endrazine/wcc
- The Witchcraft Compiler Collection
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The Cursed Computer Iceberg Meme
witchcraft compiler collection
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This is my style of coding
https://github.com/endrazine/wcc - the witchcraft compiler can take a binary and turn it into a shared library that can be loaded by another application. It also comes with a suite of tools that can help you probe an application to figure out its APIs and such.
sandsifter
- Cascade: CPU Fuzzing via Intricate Program Generation
- Sandsifter: The x86 Processor Fuzzer
- How would undocummented, private ISA extensions work in Linux-based systems?
- I found a bug in Intel Skylake processors
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Is there any opensource switch brand?
This has some background.
- Clever Hack Finds Mystery CPU Instructions
- Sandsifter – The x86 Processor Fuzzer
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The Cursed Computer Iceberg Meme
sandsifter
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Speculating the Entire x86-64 Instruction Set in Seconds with One Weird Trick
This is a really clever technique! I was impressed by sandsifter[1] when it originally came out, and this seems an awful lot faster and less prone to false negatives (since it's purely speculative and doesn't require sandsifter's `#PF` hack).
At the risk of unwarranted self-promotion: the other side of this equation is fidelity in software instruction set decoders. x86's massive size and layers of historical complexity make it among the most difficult instruction formats to accurately decode; I've spent a good part of the last two years working on a fuzzer that's discovered thousands of bugs in various popular x86 decoders[2][3].
[1]: https://github.com/xoreaxeaxeax/sandsifter
[2]: https://github.com/trailofbits/mishegos
[3]: https://ww.easychair.org/publications/preprint_download/1LHr
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Capstone Disassembler Framework
Idea:
If any assembler/disassembler author/team out there wants to produce an assembler/disassembler which is authoritative (difficult to do on x86, because there are so many different possible combinations of instruction encoding, https://github.com/xoreaxeaxeax/sandsifter : "Typically, several million undocumented instructions on your processor will be found, but these generally fall into a small number of different groups.") -- then what they'd do is to create a third program -- which "pits" the output of Assembler A vs. Assembler B, Disassembler A vs. Disassembler B...
That is, between any two assemblers (for the same CPU architecture/instruction set), or any two disassemblers, where are the anomalies?
If we think about an assembler as a simple function, y=f(x), that is, I give it a string of ascii bytes as input (x), and I get a string (1..n) binary bytes as output (y),
What are some alternatives?
trapcc - Computing with traps
rust - Empowering everyone to build reliable and efficient software.
tatradas - Disassembler for x86 executables (16-bit and 32-bit) which supports PE, NE, MZ, COM and ELF file formats
cmake-raytracer - Ray tracer written in pure CMake
fuzzing - Tutorials, examples, discussions, research proposals, and other resources related to fuzzing
dylibify - Transform any ARM macho executable to a dynamic library
lazarus - Free Pascal Lazarus Project - Sync'ed with Lazarus SubVersion trunk every 15 minutes
capstone - Capstone disassembly/disassembler framework: Core (Arm, Arm64, BPF, EVM, M68K, M680X, MOS65xx, Mips, PPC, RISCV, Sparc, SystemZ, TMS320C64x, Web Assembly, X86, X86_64, XCore) + bindings. [Moved to: https://github.com/capstone-engine/capstone]
docs - Hardware and software docs / wiki
sail-riscv - Sail RISC-V model