sirdez
OpenSERDES
sirdez | OpenSERDES | |
---|---|---|
3 | 1 | |
28 | 115 | |
- | - | |
0.0 | 10.0 | |
over 1 year ago | about 2 years ago | |
TypeScript | Verilog | |
MIT License | GNU General Public License v3.0 only |
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sirdez
OpenSERDES
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How Much Would It Cost For A Truly Open Source RISC-V SOC?
But here is an open source ASIC-proven serdes block, [OpenSERDES](https://github.com/SparcLab/OpenSERDES). [Here's the paper describing it](https://arxiv.org/abs/2105.13256). It's only 2 Gb/s per link, but it seems like that would be enough to do DDR3. It is available on Skywater OpenPDK 130nm.
What are some alternatives?
prim-rpc - Easy-to-understand, type-safe, transport-agnostic RPC/IPC for JavaScript, supporting callbacks, batching, file handling, custom serialization, and more.
OpenLANE-Sky130-Physical-Design-Workshop - Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130
rocketrpc - A typesafe framework to destroy client-server barriers.
BlueCap - iOS Bluetooth LE framework
unix-dgram-socket - Node implementation of unix datagram socket writed in TypeScript
litex - Build your hardware, easily!
graphql-yoga - 🧘 Rewrite of a fully-featured GraphQL Server with focus on easy setup, performance & great developer experience. The core of Yoga implements WHATWG Fetch API and can run/deploy on any JS environment.
litedram - Small footprint and configurable DRAM core
leap-year - ❓ Check if a year is a leap year
VexRiscv - A FPGA friendly 32 bit RISC-V CPU implementation
stablelib - A stable library of useful TypeScript/JavaScript code
bitproto - The bit level data interchange format for serializing data structures (long term maintenance).