riscv-uefi
riscv-platform-specs
riscv-uefi | riscv-platform-specs | |
---|---|---|
2 | 9 | |
21 | 109 | |
- | - | |
10.0 | 0.0 | |
about 2 years ago | 8 months ago | |
Makefile | Makefile | |
Creative Commons Attribution 4.0 | Creative Commons Attribution 4.0 |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
riscv-uefi
- StarFive VisionFive 2 SBC Now Supports TianoCore EDK II (UEFI)
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ARM or x86? ISA Doesn’t Matter
>What does matter is standardization. For example a booting process.
Truth.
This is why RISC-V put a lot of effort on this, and put it early.
Relevant specs include but isn't limited to SBI[0], UEFI protocol[1] and the ongoing platform specification[2].
0. https://github.com/riscv-non-isa/riscv-sbi-doc/releases
1. https://github.com/riscv-non-isa/riscv-uefi/releases/tag/1.0...
2. https://github.com/riscv/riscv-platform-specs
riscv-platform-specs
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Milk-V Mars: RISC-V credit card size SBC
For the higher end "Application" cores that do e.g. run Linux, there's a platform standardization effort. Refer to OS-A platform[0].
0. https://github.com/riscv/riscv-platform-specs/blob/main/risc...
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ARM or x86? ISA Doesn’t Matter
>What does matter is standardization. For example a booting process.
Truth.
This is why RISC-V put a lot of effort on this, and put it early.
Relevant specs include but isn't limited to SBI[0], UEFI protocol[1] and the ongoing platform specification[2].
0. https://github.com/riscv-non-isa/riscv-sbi-doc/releases
1. https://github.com/riscv-non-isa/riscv-uefi/releases/tag/1.0...
2. https://github.com/riscv/riscv-platform-specs
- $70 RISC-V Computer from Pine64 Goes on Sale April 4 – OMG Linux
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Ubuntu on new RISC-V boards: thoughts?
For the record the RISC-V foundation already has a working group developing platform standards. Currently they have OS-A Server for servers, OS-A Embedded for small boards and the M platform for Zephyr/Linux NOMMU size systems. https://github.com/riscv/riscv-platform-specs/blob/main/riscv-platform-spec.pdf
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IBM PC like extensions for SBI
The SBI console stuff are deprecated with no replacements. And if you checkout https://github.com/riscv/riscv-platform-specs/blob/main/riscv-platform-spec.adoc, OS kernels really are expected to just find a 8250 or 16550 in the device tree, or as mentioned in a few other comments, use UEFI.
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Addressing Criticism of RISC-V Microprocessors
Platforms: https://github.com/riscv/riscv-platform-specs/blob/main/riscv-platform-spec.adoc
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SiFive HiFive Unmatched successor in the works
There’s no indication of when the next iteration of the “Un” board will be, but it would be interesting to see if they’re targeting today’s tech, or something that’s around the corner such as the upcoming platform spec https://github.com/riscv/riscv-platform-specs/blob/main/riscv-platform-spec.adoc
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RISC-V Int. Ratifies 15 New Specs, Opening Up New RISC-V Design Possibilities
If you're building a chip for a server, workstation, cellphone you'll want to adhere to the platform spec.
RVA22[0] is the first one, and among other important things which go a long way to ease cross-vendor software compatibility, it does specify a set of extensions which are required.
[0]: https://github.com/riscv/riscv-platform-specs/blob/main/risc...
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New RISCV Specification
You’ll find the current RISC-V platform specification here.
What are some alternatives?
riscv-sbi-doc - Documentation for the RISC-V Supervisor Binary Interface
riscv-profiles - RISC-V Architecture Profiles
vroom - VRoom! RISC-V CPU
riscv-v-spec - Working draft of the proposed RISC-V V vector extension
edk2
riscv-crypto - RISC-V cryptography extensions standardisation work.
riscv-bitmanip - Working draft of the proposed RISC-V Bitmanipulation extension
riscv-uefi-edk2-docs - Documentation and status of UEFI on RISC-V
riscv-isa-manual - RISC-V Instruction Set Manual