ARM or x86? ISA Doesn’t Matter

This page summarizes the projects mentioned and recommended in the original post on news.ycombinator.com

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  • vroom

    VRoom! RISC-V CPU (by MoonbaseOtago)

  • I had VROOM! in mind (https://github.com/MoonbaseOtago/vroom) because I remembered it aims for 4 IPC avg with a width of 8. Though looking again it's 8 compressed 16 bit instructions or 4 uncompressed 32 bit instruction.

    So you could argue a real mix of instructions is not going to be all 16 bit but some 16 and some 32, so the 8 is rarely achieved in practice, and also the block diagram only shows 4 decode blocks. But it can in fact peak at 8 instructions decoded per clock, so I think that qualifies. (You could even argue it's especially impressive, since RISC-V technically qualifies as variable-length encoding like x86, it's just that only 16/32 instructions are really used at the moment)

  • riscv-sbi-doc

    Documentation for the RISC-V Supervisor Binary Interface

  • >What does matter is standardization. For example a booting process.

    Truth.

    This is why RISC-V put a lot of effort on this, and put it early.

    Relevant specs include but isn't limited to SBI[0], UEFI protocol[1] and the ongoing platform specification[2].

    0. https://github.com/riscv-non-isa/riscv-sbi-doc/releases

    1. https://github.com/riscv-non-isa/riscv-uefi/releases/tag/1.0...

    2. https://github.com/riscv/riscv-platform-specs

  • InfluxDB

    Power Real-Time Data Analytics at Scale. Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.

    InfluxDB logo
  • riscv-uefi

  • >What does matter is standardization. For example a booting process.

    Truth.

    This is why RISC-V put a lot of effort on this, and put it early.

    Relevant specs include but isn't limited to SBI[0], UEFI protocol[1] and the ongoing platform specification[2].

    0. https://github.com/riscv-non-isa/riscv-sbi-doc/releases

    1. https://github.com/riscv-non-isa/riscv-uefi/releases/tag/1.0...

    2. https://github.com/riscv/riscv-platform-specs

  • riscv-platform-specs

    Discontinued RISC-V Profiles and Platform Specification

  • >What does matter is standardization. For example a booting process.

    Truth.

    This is why RISC-V put a lot of effort on this, and put it early.

    Relevant specs include but isn't limited to SBI[0], UEFI protocol[1] and the ongoing platform specification[2].

    0. https://github.com/riscv-non-isa/riscv-sbi-doc/releases

    1. https://github.com/riscv-non-isa/riscv-uefi/releases/tag/1.0...

    2. https://github.com/riscv/riscv-platform-specs

NOTE: The number of mentions on this list indicates mentions on common posts plus user suggested alternatives. Hence, a higher number means a more popular project.

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