risc-v-examples
RISC-V examples for GD32V, K210, and QEMU (by robertlipe)
riscv-gnu-toolchain
GNU toolchain for RISC-V, including GCC (by riscv-collab)
| risc-v-examples | riscv-gnu-toolchain | |
|---|---|---|
| 1 | 35 | |
| 2 | 3,146 | |
| - | 2.2% | |
| 1.8 | 8.2 | |
| about 2 years ago | 7 days ago | |
| C | C | |
| BSD 2-clause "Simplified" License | GNU General Public License v3.0 or later |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
risc-v-examples
Posts with mentions or reviews of risc-v-examples.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-01-30.
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Toolchain / Compiler Question
Your next step of launching into the subset of C that you can provide totally on your own,but setting up enough of the environment for it to really be like C (e.g. no printf, but you can write loops and do math stuff and honk on hardware bits) will probably look closer to this: https://github.com/robertlipe/risc-v-examples/tree/main/qemu-boot ...which I totally should have looked at BEFORE writing the above from scratch.
riscv-gnu-toolchain
Posts with mentions or reviews of riscv-gnu-toolchain.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-12-10.
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Is RISC-V ready for HPC? Evaluating the 64-core Sophon SG2042 RISC-V CPU
> no absurdely and grotesquely massive and complex compilers anywhere
Absence of evidence is not evidence of absence, and anyway there's not even an absence: https://github.com/riscv-collab/riscv-gnu-toolchain https://llvm.org/docs/RISCVUsage.html
> feature creeps on computer language syntax nowhere to be found
At least one of us is very confused, and in case it's me, how do language details matter to RISC-V?
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Help trying to build for riscv64gc-unknown-linux-musl
I then looked at the .cargo/config.toml provided by the guide and saw that it wasn't actually statically compiling the code. After a bit of tinkering and building my own toolchain from here, I ended up with this config.toml file:
- GNU toolchain for RISC-V including GCC
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Building a toolchain suitable for compiling V extension code
b) collabriscv - essentially gcc 12.2 + binutils master/2.40 as per https://github.com/riscv-collab/riscv-gnu-toolchain
- How do i specify vendor name while building the GNU toolchain?
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GCC 13 Adds RISC-V T-Head Vendor Extension Collection
Or would it be better to take what is in https://github.com/riscv-collab/riscv-gnu-toolchain which is gcc 12.2 and start from there?
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How to build toolchain with Zbs extension?
I'm not able to build https://github.com/riscv-collab/riscv-gnu-toolchain.git like this:
What are some alternatives?
When comparing risc-v-examples and riscv-gnu-toolchain you can also consider the following projects:
LibreELEC.tv - Just enough OS for KODI
riscv-binutils-gdb - RISC-V backports for binutils-gdb. Development is done upstream at the FSF.