openFPGALoader VS RV-Debugger-BL702

Compare openFPGALoader vs RV-Debugger-BL702 and see what are their differences.

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openFPGALoader RV-Debugger-BL702
13 5
1,056 144
- 0.0%
9.2 0.0
21 days ago about 1 year ago
C++ C
Apache License 2.0 Apache License 2.0
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.

openFPGALoader

Posts with mentions or reviews of openFPGALoader. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2023-06-23.

RV-Debugger-BL702

Posts with mentions or reviews of RV-Debugger-BL702. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2023-03-20.
  • Does the BL702 by Sipeed work on all Gowin FPGA?
    1 project | /r/GowinFPGA | 14 Aug 2023
  • LLaMa-cpp: RISC-V (TH1520&D1) benchmark and hack for <1GB DDR device
    2 projects | /r/RISCV | 20 Mar 2023
    The humble BL702 is an external 144MHz and 132KB of RV32IC that has at least 8 bits shared between CPUs and some cross-interrupt lines. This is so they can basically implement a [url=https://github.com/sipeed/RV-Debugger-BL702] a sub-$4 serial console + a JTAG port on the same serial cable] (at China's cost to China, that's cheaper than an FTDI-2323-this-quarter part. This is the same CPU with different peripherals attached (notably trades Zigbee for Wifi) as the BL602
  • Questions regarding GAO (GOWIN Analyzer Oscilloscope)
    1 project | /r/GowinFPGA | 31 Jan 2023
    This question is in reference to the wiki article here: https://www.reddit.com/r/GowinFPGA/wiki/tutorials/gowin_analyzer_oscilloscope/ As well as the project here: https://github.com/sipeed/RV-Debugger-BL702
  • issue with Gowin 20k and openFPGAloader
    4 projects | /r/GowinFPGA | 15 Jan 2023
    talking about the RV-debug "dongle", that has it's own FW too https://github.com/sipeed/RV-Debugger-BL702 and i'm wondering if there could be different version or my own is not up-to-date. how could i check the current running version?
  • How to set up mtvec vector mode?
    1 project | /r/RISCV | 16 Sep 2021
    It's an interesting irony that even the way to do inexpensive JTAG now is via RISC-V. It's slower than a Segger, but I can afford to leave one cabled up to all the things.

What are some alternatives?

When comparing openFPGALoader and RV-Debugger-BL702 you can also consider the following projects:

pcm - Processor Counter Monitor [Moved to: https://github.com/intel/pcm]

llama.cpp - LLM inference in C/C++

XVC-FTDI-JTAG - Xilinx virtual cable server for generic FTDI 4232H.

pcm - IntelĀ® Performance Counter Monitor (IntelĀ® PCM)

prjxray - Documenting the Xilinx 7-series bit-stream format.

XilinxVirtualCable - Xilinx Virtual Cable (XVC) is a TCP/IP-based protocol that acts like a JTAG cable and provides a means to access and debug your FPGA or SoC design without using a physical cable.

neorv32 - :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

nmigen - A refreshed Python toolbox for building complex digital hardware. See https://gitlab.com/nmigen/nmigen

CH552-JTAG - USB-JTAG Adapter Using CH552

nano4k_hdmi_tx - Open-source HDMI/DVI transmitter for the Gowin GW1NSR-powered Tang Nano 4K

hlslib - A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.

xvcd - Xilinx Virtual Cable Daemon