mmperf
PurefunctionPipelineDataflow
| mmperf | PurefunctionPipelineDataflow | |
|---|---|---|
| 2 | 172 | |
| 122 | 440 | |
| 4.1% | - | |
| 4.3 | 7.4 | |
| 8 months ago | 17 days ago | |
| C++ | ||
| Apache License 2.0 | - |
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
mmperf
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PyTorch on Apple M1 Faster Than TensorFlow-Metal
Here are the matmul sizes for the MiniLM model used for inference: https://github.com/mmperf/mmperf/blob/main/benchmark_sizes/b...
These are the matmul sizes for the BERT training workload https://github.com/mmperf/mmperf/blob/main/benchmark_sizes/b...
Yes we use the latest MoltenVK (1.3.204.0) installed in the system.
I will let @noxa and other IREE devs chime in on the SPIR-V path but we do support prefix sums etc in the GPU path.
//part of nod.ai team.
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M1 Pro First Impressions: Core Management and CPU Performance
Could you give me a benchmark in particular? Or maybe this one works: https://github.com/mmperf/mmperf. I'll run it in an hour.
PurefunctionPipelineDataflow
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Goodbye, Clean Code
Implement relational data model and programming based on hash-map (NoSQL)
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How can I learn functional programming?
The Math-based Grand Unified Programming Theory: The Pure Function Pipeline Data Flow with Principle-based Warehouse/Workshop Model
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Does Intel have an answer (or developing one) for AMDs Infinity Fabric?
I criticized "AMD Infinity Fabric Architecture" at the end of my article "Prediction: Intel will use "RISC-V plus x86 compatibility layer" or "RISC-V plus x86 heterogeneous computing architecture" to develop a new generation of "warehouse/workshop model" CPU".
- The Math-based Grand Unified Programming Theory: The Pure Function Pipeline Data Flow with principle-based Warehouse/Workshop Model
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What should I do to defend my rights if the architecture of the Apple M1 chip is plagiarized from my theory and architecture?
What's more, you're being somewhat liberal with your "invention" dates here anyway. I'm sure you realize that anyone can review the commit history to see when content was added to the repo. As of Nov 2020, the day Apple announced a fully operational and tested, ready-to-ship silicon package the repo was a just series of bullet points listing out well-known concepts of functional programming sprinkled with some religious analogies and inspirational quotes. The farther you go back in the repo commit history, the less content is there.
- Apple M1 Ultra's architecture is a mistake, and Why Apple is not the creator of the M1 architecture? (with comment from chip designer who have worked at Apple for decades)
- M1 Ultra's architecture is a mistake, and Why Apple is not the creator of the M1 architecture? (with comment from chip designers who have worked at Apple for decades)
What are some alternatives?
Flops - How many FLOPS can you achieve?
concurrencpp - Modern concurrency for C++. Tasks, executors, timers and C++20 coroutines to rule them all
shark-samples
gophernotes - The Go kernel for Jupyter notebooks and nteract.
flops - Tiny cpu benchmark
verona - Research programming language for concurrent ownership
cutlass - CUDA Templates for Linear Algebra Subroutines
clojurust - A proof of concept version of Clojure in Rust.
iree - A retargetable MLIR-based machine learning compiler and runtime toolkit.
refterm - Reference monospace terminal renderer
performance_results - performance results/benchmarks for a variety of machines
BetterDummy - Unlock your displays on your Mac! Smooth scaling, HiDPI unlock, XDR/HDR extra brightness upscale, DDC, brightness and dimming, dummy displays, PIP and lots more! [Moved to: https://github.com/waydabber/BetterDisplay]