hlslib
A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life. (by definelicht)
red-pitaya-notes
Notes on the Red Pitaya Open Source Instrument (by pavel-demin)
hlslib | red-pitaya-notes | |
---|---|---|
1 | 1 | |
287 | 316 | |
- | - | |
4.1 | 9.0 | |
17 days ago | about 2 months ago | |
C++ | Tcl | |
BSD 3-clause "New" or "Revised" License | MIT License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
hlslib
Posts with mentions or reviews of hlslib.
We have used some of these posts to build our list of alternatives
and similar projects.
-
Anyone Working with Vitis Out There?
In terms of community, we maintain a library with various quality of life improvements for working with Vitis and Vitis HLS: https://github.com/definelicht/hlslib
red-pitaya-notes
Posts with mentions or reviews of red-pitaya-notes.
We have used some of these posts to build our list of alternatives
and similar projects.
-
Share data with PL from PS ( Petalinux)
configuration register module with AXI4-Lite slave interface and with a configurable number of addressable registers (FDRE). The output of each register can be individually connected to ports of other modules and output pins. If you do not need more than 32 bits of configuration registers, then AXI GPIO can be also used in a similar way.
What are some alternatives?
When comparing hlslib and red-pitaya-notes you can also consider the following projects:
Vitis-Tutorials - Vitis In-Depth Tutorials
cariboulite - CaribouLite turns any 40-pin Raspberry-Pi into a Tx/Rx 6GHz SDR