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vISA
- My Six Lines of Verilog Code Turing Complete BitBitJump Is Now Under the GPLv3
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1-bit CPU for 'super low-performance computer' launched – sells out promptly
Speed test against my six lines of verilog cpu when? *
https://gitlab.com/VitalMixofNutrients/vISA
* Only six lines of verilog if one only uses FPGA LUTs as Ram.
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Hey I'm genuinely curious about what makes you guys like working.
Well, I made a CPU Instruction Set Architecture called Bit-Bit-Jump that can simulate Bit-Bit-Jump Machine Code at approximately 5.6 Megahertz here: https://gitlab.com/VitalMixofNutrients/vISA
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What is easier for programmers to understand? An entire program that was written in one source code file, or an entire directory of source code files getting statically / dynamically linked into an entire program?
Hello. Over the past six months, I have been working on a CPU ISA named Bit-Bit-Jump. Suprisingly, it is actually the world's simplest CPU ISA, comprising only SIX lines of Verilog code.
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Error: Unsupported tristate construct (not in propagation graph):
You're right, it doesn't look like an actual binary.. How can I turn it into an actual binary?
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What is your take on ISA architectures for FPGAs (x86, arm, risc-v)?
Well, the simplest ISA is six lines of Verilog and it's called Bit-Bit-Jump
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MSc thesis topic advice related with fpga.
Idea: Because I don't have the money for Vivado (Free version is limited to a few thousand lines of Verilog) / Quartus (Free version won't let me perform DPR), it would be awesome if you could find a way to implement my Bit-Bit-Jump Soft-Core into your project. Here's my project: https://gitlab.com/VitalMixofNutrients/vISA (Licensed under GPLv2 Only.)
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When you implement an CPU ISA (Bit-Bit-Jump) in only six lines of Verilog:
My BBJ code is available here: https://gitlab.com/VitalMixofNutrients/vISA/-/raw/vISA/sources/sim/verilator/BBJ/BBJ.v (Licensed under GPLv2 only.)
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What architecture is the most chad?
Bit-Bit-Jump.
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Anon can't get a job
(My coding project in question: https://gitlab.com/VitalMixofNutrients/vISA)
acwj
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Toy C compiler, worth having an IR stage?
I wrote https://github.com/DoctorWkt/acwj. I'm working on a version with an IR so I can add some optimisations to it. I'd say, yes, have an IR :-)
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Resources for beginners
Here's another resource: https://github.com/DoctorWkt/acwj
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Why Take a Compiler Course?
I currently study https://github.com/DoctorWkt/acwj which is quite interesting I have to admit.
I'm interested in this topic, because I want to participate in TinyC compiler's development; I use it quite often to run C demos of mine and its execution is instant.
The least I can do is to either fix bugs or extend it to support more C99, C11, C17 features, and why not even C23 as soon as it gets approved?
All I need is to gain the necessary knowledge and experience to jump right in and start fixing things.
- Any good references/tutorials/text’s for building a compiler?
- A Compiler Writing Journey
- Why does Rust have parameters on impl?
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Toy languages for implementing a compiler.
I took a journey writing my first compiler, and started with just evaluating integer expressions. From there, I moved to adding language features and ended up with a compiler that could compile itself: https://github.com/DoctorWkt/acwj
- Acwj - A Compiler Writing Journey
What are some alternatives?
ao486_MiSTer - ao486 port for MiSTer
nelua-lang - Minimal, efficient, statically-typed and meta-programmable systems programming language heavily inspired by Lua, which compiles to C and native code.
microwatt - A tiny Open POWER ISA softcore written in VHDL 2008
os-tutorial - How to create an OS from scratch
VexRiscvBPluginGenerator
chibicc - A small C compiler
verilator - Fork of Verilator with prebuilt Ubuntu binaries (https://www.veripool.org/wiki/verilator)
dnsguide - A guide to writing a DNS Server from scratch in Rust
dcc - Dan's C compiler
write-a-C-interpreter - Write a simple interpreter of C. Inspired by c4 and largely based on it.
Smallpond - Brand new RISC architecture created in CSE 490
jonesforth - Mirror of JONESFORTH