elena-lang
ispc
| elena-lang | ispc | |
|---|---|---|
| 2 | 4 | |
| 224 | 2,405 | |
| 0.4% | 0.7% | |
| 7.7 | 9.5 | |
| 5 days ago | 9 days ago | |
| C++ | C++ | |
| MIT License | BSD 3-clause "New" or "Revised" License |
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For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
elena-lang
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ELENA 6.0.1b is out
Please visit a release page to get an access for binaries : https://github.com/ELENA-LANG/elena-lang/releases/tag/v6.0.1b
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Building and running ELENA 6.0
git clone https://github.com/ELENA-LANG/elena-lang.git
ispc
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Implementing a GPU's Programming Model on a CPU
This so-called GPU programming model has existed many decades before the appearance of the first GPUs, but at that time the compilers were not so good like the CUDA compilers, so the burden for a programmer was greater.
As another poster has already mentioned, there exists a compiler for CPUs which has been inspired by CUDA and which has been available for many years: ISPC (Implicit SPMD Program Compiler), at https://github.com/ispc/ispc .
NVIDIA has the very annoying habit of using a lot of terms that are different from those that have been previously used in computer science for decades. The worst is that NVIDIA has not invented new words, but they have frequently reused words that have been widely used with other meanings.
SIMT (Single-Instruction Multiple Thread) is not the worst term coined by NVIDIA, but there was no need for yet another acronym. For instance they could have used SPMD (Single Program, Multiple Data Stream), which dates from 1988, two decades before CUDA.
Moreover, SIMT is the same thing that was called "array of processes" by C.A.R. Hoare in August 1978 (in "Communicating Sequential Processes"), or "replicated parallel" by Occam in 1985 or "PARALLEL DO" by "OpenMP Fortran" in 1997-10 or "parallel for" by "OpenMP C and C++" in 1998-10.
The only (but extremely important) innovation brought by CUDA is that the compiler is smart enough so that the programmer does not need to know the structure of the processor, i.e. how many cores it has and how many SIMD lanes has each core. The CUDA compiler distributes automatically the work over the available SIMD lanes and available cores and in most cases the programmer does not care whether two executions of the function that must be executed for each data item are done on two different cores or on two different SIMD lanes of the same core.
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SIMD intrinsics and the possibility of a standard library solution
ISPC: https://github.com/ispc/ispc
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Prefix Sum with SIMD
Have you looked at [ISPC - Intel SPMD Program Compiler][0]?
[0]: https://github.com/ispc/ispc - Duff’s Device in 2021
What are some alternatives?
virna - 🚀 A programming language designed to be stack-based and concatenative with reverse polish notation
highway - Performance-portable, length-agnostic SIMD with runtime dispatch
loop - Loop is an open-source software organization.
Beef - Beef Programming Language
Peregrine - A blazing fast language for the blazing fast world(WIP)
ParallelReductionsBenchmark - Thrust, CUB, TBB, AVX2, CUDA, OpenCL, OpenMP, SyCL - all it takes to sum a lot of numbers fast!
HODL - A Higher-Level Quantum Oracle Description Language (HODL)
micro-profiler - Cross-platform low-footprint realtime C/C++ Profiler
tutorials - List of tutorials in ELENA
lunix - Lua Unix Module.
Z-Sharp - Custom programming interpreter for ZSharp (Z#), a custom game programming language I made
eve - Expressive Vector Engine - SIMD in C++ Goes Brrrr