c4 VS selfie

The C4 compiler [https://github.com/rswier/c4] is a self-hosting compiler for a subset of the C programming language that produces executable x86 code. You can understand and audit this code in a couple of hours (its 528 lines).

It could be an interesting exercise to bootstrap up from something like this to a working linux environment based solely on source code compilation : no binary inputs. Of course a full linux environment has way too much source code for one person or team to audit, but at least it rules out RoTT style binary compiler contamination.

I was surprised to see nodes still have two pointers ("references") given that you now know that that the first pointer will always point exactly to the next node. I've see https://github.com/rswier/c4 use that. Granted it doesn't make for the most readable code, but it's even smaller and faster.

VMs with simple instruction sets is a fun topic. Some years ago I got inspired by the amazing rswier/c4 compiler by Robert Swierczek and explored the smallest instruction set I could get away with to create VMs that could run non-trivial workloads.

C4 comes to mind (C in 4 functions), https://github.com/rswier/c4.

have you considered adding a backend for LLVM? perhaps a bit heavyweight, but it could be a good way to get C/C++, fortran, rust, etc. if that's something you'd like!

I use Alpine Linux (no GNU bloat btw), dwm (Sucks less!), and I edit all my C (no bloat language) through busybox ed and compile my programs with (c4)[https://github.com/rswier/c4]

Keep in mind you can create a "usable" C compiler by yourself, and is doable in surprisingly low amount of code. Try https://github.com/rswier/c4/blob/master/c4.c

this sort of exists at https://github.com/cksystemsteaching/selfie

> Selfie is a self-contained 64-bit, 12KLOC C implementation of: (...) a tiny (...) subset of C called C Star (C) (...) to a tiny (...) subset of RISC-V called RISC-U[;] a[n] (...) emulator (...) that executes RISC-U code[;] (...) a (...) hypervisor (...) that provides RISC-U virtual machines*

so they have an instruction set architecture, a compiler, and an operating system, though it's much simpler than xv6. because the instruction set is a subset of risc-v you can run its code on actual risc-v hardware (or qemu-system-riscv), but presumably you could also design risc-u hardware in verilog that was simpler than a full implementation of rv64i with whatever extensions the hypervisor needs