atopile
Design circuit boards with code! ✨ Get software-like design reuse 🚀, validation, version control and collaboration in hardware; starting with electronics ⚡️ (by atopile)
logic-card
By Timot05
| atopile | logic-card | |
|---|---|---|
| 2 | 2 | |
| 1,696 | 10 | |
| 5.1% | - | |
| 9.9 | 8.6 | |
| 1 day ago | 20 days ago | |
| Python | C++ | |
| Apache License 2.0 | MIT License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
atopile
Posts with mentions or reviews of atopile.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2024-02-05.
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Show HN: Atopile – Design circuit boards with code
That's awesome! We're definitely thinking along the same lines in terms of a lot of those optimisations / cost-functions.
Here's some of the basics Tim was playing with earlier: https://github.com/atopile/atopile/blob/d25686952534e0f96582...
logic-card
Posts with mentions or reviews of logic-card.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2024-02-05.
-
Show HN: Atopile – Design circuit boards with code
IMO it's hard to spot the "holes" for parameters in a module - for instance, in the logic-card project the instantiations of "LDOReg" end up setting values of objects in "Vdiv" two abstraction layers down.
https://github.com/Timot05/logic-card/blob/a63581636233dd1f9...
What are some alternatives?
When comparing atopile and logic-card you can also consider the following projects:
f4pga - FOSS Flow For FPGA
skidl - SKiDL is a module that extends Python with the ability to design electronic circuits.