Box64 and RISC-V

• thead-extension-spec

  2 27 6.5 Makefile

  T-head vendor extension Instruction Set spec

  

TH1520 (and SG2042, D1) have THead custom extension that contains a lot of the same things as Zba and Zbb, just slightly different and with encodings in the custom opcode spaces.

e.g. "th.addsl rd, rs1, rs2, imm2" which has an immediate field for the shift instead of separate instructions (which is just documentation really), and shifts rs2 while Zba's sh1add, sh2add, sh3add shift rs1.

Also th.ff0, th.ff1, th.rev, th.tstnbz (same as orc.b but with inverted result)

They also have pre- and post-increment loads and stores with writeback of the incremented pointer, and [rs1 + rs2 << imm2] loads and stores, which can be useful for JITing x86 (or ARM) addressing modes.

https://github.com/T-head-Semi/thead-extension-spec/releases...

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