riscv-gnu-toolchain
riscv-binutils-gdb
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| riscv-gnu-toolchain | riscv-binutils-gdb | |
|---|---|---|
| 35 | 4 | |
| 3,121 | 139 | |
| 4.2% | - | |
| 8.2 | 9.8 | |
| 6 days ago | almost 2 years ago | |
| C | C | |
| GNU General Public License v3.0 or later | GNU General Public License v3.0 only |
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riscv-gnu-toolchain
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Is RISC-V ready for HPC? Evaluating the 64-core Sophon SG2042 RISC-V CPU
> no absurdely and grotesquely massive and complex compilers anywhere
Absence of evidence is not evidence of absence, and anyway there's not even an absence: https://github.com/riscv-collab/riscv-gnu-toolchain https://llvm.org/docs/RISCVUsage.html
> feature creeps on computer language syntax nowhere to be found
At least one of us is very confused, and in case it's me, how do language details matter to RISC-V?
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Help trying to build for riscv64gc-unknown-linux-musl
I then looked at the .cargo/config.toml provided by the guide and saw that it wasn't actually statically compiling the code. After a bit of tinkering and building my own toolchain from here, I ended up with this config.toml file:
- GNU toolchain for RISC-V including GCC
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Building a toolchain suitable for compiling V extension code
b) collabriscv - essentially gcc 12.2 + binutils master/2.40 as per https://github.com/riscv-collab/riscv-gnu-toolchain
- How do i specify vendor name while building the GNU toolchain?
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GCC 13 Adds RISC-V T-Head Vendor Extension Collection
Or would it be better to take what is in https://github.com/riscv-collab/riscv-gnu-toolchain which is gcc 12.2 and start from there?
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How to build toolchain with Zbs extension?
I'm not able to build https://github.com/riscv-collab/riscv-gnu-toolchain.git like this:
riscv-binutils-gdb
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How to extend Risc-V P extension in riscv-gcc and riscv-binutils?
binutils: https://github.com/riscvarchive/riscv-binutils-gdb/pull/257
- Allwinner D1 extensions
- QEMU 7.0 will support RVV 1.0, Zfh and Zfhmin, enable Zb[abcs] by default, etc.
- Sipeed tease new Allwinner D1 board
What are some alternatives?
risc-v-examples - RISC-V examples for GD32V, K210, and QEMU
rvv-llvm - This repository is outdated, support for RISC-V is now developed in upstream LLVM
qemu
buildroot - Buildroot, making embedded Linux easy. Note that this is not the official repository, but only a mirror. The official Git repository is at http://git.buildroot.net/buildroot/. Do not open issues or file pull requests here.
riscv-v-spec - Working draft of the proposed RISC-V V vector extension
freedom-tools - Tools for SiFive's Freedom Platform
riscv-gcc
xv6-riscv - Xv6 for RISC-V
riscv-gnu-toolchain - GNU toolchain for RISC-V, including GCC [Moved to: https://github.com/riscv-collab/riscv-gnu-toolchain]
riscv-gnu-toolchain - GNU toolchain for RISC-V, including GCC