meta-riscv
OpenEmbedded/Yocto layer for RISC-V Architecture (by riscv)
arvsom
System on Module based on StarFive 71x0 SoC. (by antmicro)
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meta-riscv | arvsom | |
---|---|---|
3 | 1 | |
331 | 42 | |
1.2% | - | |
7.9 | 0.0 | |
about 7 hours ago | 9 months ago | |
BitBake | ||
GNU General Public License v3.0 or later | Apache License 2.0 |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
meta-riscv
Posts with mentions or reviews of meta-riscv.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-03-11.
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New to embedded
There does exist a Yocto recipe for RISC-V that claims to support both 32 and 64-bit. I haven't used it myself, but your best bet may be spin up a custom Yocto/OE based distro. You can find the source and documentation here: https://github.com/riscv/meta-riscv
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Pine64 August update: RISC and reward
Great news !. We have a yocto port for JH7110 here https://github.com/riscv/meta-riscv/blob/master/conf/machine/visionfive.conf, I will be happy to add a machine conf for pine64, It should be easy enough to start from above as template.
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Support of the Nezha Allwinner D1 - Yocto kirkstone
Remember our blog post about #Nezha board? It is an SBC with a #RISC-V D1 chip onboard. If you have knowledge of #Yocto, from now on you can create a system image using the #meta-riscv layer. For more please refer to our pull request at GitHub repository: https://github.com/riscv/meta-riscv/pull/327
arvsom
Posts with mentions or reviews of arvsom.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2022-08-28.
What are some alternatives?
When comparing meta-riscv and arvsom you can also consider the following projects:
darkriscv - opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
meta-balena - A collection of Yocto layers used to build balenaOS images
ready-set-yocto - A short, unofficial guide on getting started with Yocto using a Raspberry Pi
meta-dimitriOS - A BitBake layer for my Linux based projects
meta-sifive - SiFive OpenEmbedded / Yocto BSP Layer
freedom-u-sdk - Freedom U Software Development Kit (FUSDK)
iob-linux
meta-rust - OpenEmbedded/Yocto layer for Rust and Cargo
meta-asteroid - OpenEmbedded layer that provides the basis of AsteroidOS
iob-soc-opencryptolinux - Running Linux on IOb-SoC-OpenCryptoHW
meta-rauc - Yocto/Open Embedded meta layer for RAUC, the embedded Linux update framework
meta-riscv vs darkriscv
meta-riscv vs meta-balena
meta-riscv vs ready-set-yocto
meta-riscv vs meta-dimitriOS
meta-riscv vs meta-sifive
meta-riscv vs freedom-u-sdk
meta-riscv vs iob-linux
meta-riscv vs meta-rust
meta-riscv vs meta-asteroid
meta-riscv vs iob-soc-opencryptolinux
meta-riscv vs meta-rauc