SCR1 is a high-quality open-source RISC-V MCU core in Verilog
Why do you think that https://github.com/tilk/riscv-simple-sv is a good alternative to scr1
SCR1 is a high-quality open-source RISC-V MCU core in Verilog
Why do you think that https://github.com/tilk/riscv-simple-sv is a good alternative to scr1