Capcom System 1/1.5/2 compatible verilog core for FPGA
Why do you think that https://github.com/mrchrisster/MiSTer_SAM is a good alternative to jtcps
Capcom System 1/1.5/2 compatible verilog core for FPGA
Why do you think that https://github.com/mrchrisster/MiSTer_SAM is a good alternative to jtcps