FPGA based MIT CADR lisp machine - rewritten in modern verilog - boots and runs
Why do you think that https://github.com/dseagrav/ld is a good alternative to cpus-caddr
FPGA based MIT CADR lisp machine - rewritten in modern verilog - boots and runs
Why do you think that https://github.com/dseagrav/ld is a good alternative to cpus-caddr