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mrisc32-a1 reviews and mentions

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Running Quake on an FPGA (Custom MRISC32 CPU) [video]
5 projects | news.ycombinator.com | 17 Jan 2024

And how do the vectors work with branch prediction? If the CPU speculatively starts executing a vector instruction and it turns out it shouldn't, there should be a mechanism to abort the vector sequencing (or nullify the writebacks while letting the vector sequencing play out).
I don't see that in the overview here, but I guess it's just a low-level detail that isn't drawn:
https://gitlab.com/mrisc32/mrisc32-a1/-/raw/master/mrisc32-a...