Examples of RISC-V Assembly Programs

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  • glibc

    Discontinued GNU Libc

  • If that's too simple for you, you can have fun with the strlen implementation in glibc:

    https://github.com/lattera/glibc/blob/master/string/strlen.c

  • riscv-asm-manual

    RISC-V Assembly Programmer's Manual

  • > Note: "jalr zero, 1b" can also be written as "j 1b", "jalr zero, 0(ra)" can be written as "ret"

    `j` and `ret` are so-called "pseudo instructions" [1], not compressed instructions.

    Pseudo instructions are just shortcuts used in assembly language to pretend that some common operations really "exist" with the need to type (or display) the real, more complex instructions. `nop` is a common pseudo instruction. RISC-V has `nop` instructions, but, instead, the "do nothing instruction" is canonically encoded as `addi x0, x0, 0`.

    The compressed instruction set (a.k.a "extension C") is a subset of the full [2] instruction set, in which a restricted combinations of operands are possible. The assembly (human readable) code of the compressed instruction set looks similar to that of the full instruction set (including pseudo instructions), but they are encoded as completely different binary sequences.

    [1] https://github.com/riscv/riscv-asm-manual/blob/master/riscv-...

    [2] https://riscv.org/wp-content/uploads/2019/06/riscv-spec.pdf#...

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