pin-uart
FPGA board-level debugging and reverse-engineering tool (by alexforencich)
red-pitaya-notes
Notes on the Red Pitaya Open Source Instrument (by pavel-demin)
pin-uart | red-pitaya-notes | |
---|---|---|
2 | 1 | |
24 | 316 | |
- | - | |
2.9 | 9.0 | |
about 1 year ago | about 1 month ago | |
Tcl | Tcl | |
- | MIT License |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
pin-uart
Posts with mentions or reviews of pin-uart.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2023-03-12.
- Pin UART FPGA board-level debugging and reverse-engineering tool
-
Reverse engineering unsocumented FPGA board?
This concept can be handy, https://github.com/alexforencich/pin-uart
red-pitaya-notes
Posts with mentions or reviews of red-pitaya-notes.
We have used some of these posts to build our list of alternatives
and similar projects.
-
Share data with PL from PS ( Petalinux)
configuration register module with AXI4-Lite slave interface and with a configurable number of addressable registers (FDRE). The output of each register can be individually connected to ports of other modules and output pins. If you do not need more than 32 bits of configuration registers, then AXI GPIO can be also used in a similar way.
What are some alternatives?
When comparing pin-uart and red-pitaya-notes you can also consider the following projects:
clash-spaceinvaders - Intel 8080-based Space Invaders arcade machine implemented on an FPGA, written in CLaSH
cariboulite - CaribouLite turns any 40-pin Raspberry-Pi into a Tx/Rx 6GHz SDR