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riscv-opcodes discussion
riscv-opcodes reviews and mentions
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How to improve the RISC-V specification
It uses machine-readable specs from https://github.com/riscv/riscv-opcodes ; yet I needed to extract immediate bit scrambling from their LaTeX sources :). I wonder if there is an easier way. Anyways, the opcode semantics are hand-coded and it simulates enough to boot linux.
- Help needed in building cavatools
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RISC-V remaining insn free space
A couple of hours work would allow someone to work it out exactly by parsing the files in https://github.com/riscv/riscv-opcodes. I don't know whether the existing parse.py explicitly works this out. It does check for conflicts. If it doesn't provide this information now then it should be easy to add.
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How to extend Risc-V P extension in riscv-gcc and riscv-binutils?
Add instruction's match and mask values and optionally add DECLARE_INSN definitions (include/opcode/riscv-opc.h). You can use riscv-opcodes to generate those mask/match values.
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Programming 101: writing a RISCV assembler - the worlds smallest!
I'm a bit surprised René doesn't know about either https://github.com/riscv/riscv-opcodes or https://github.com/michaeljclark/riscv-meta
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A note from our sponsor - Scout Monitoring
www.scoutapm.com | 16 Jun 2024
Stats
riscv/riscv-opcodes is an open source project licensed under BSD 3-clause "New" or "Revised" License which is an OSI approved license.
The primary programming language of riscv-opcodes is Python.