RISC-V SBI and the full boot process

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  • riscv-sbi-doc

    Documentation for the RISC-V Supervisor Binary Interface

  • >Is there any merit in having UART at different addresses on different machines?

    Is there any... advantage?

    If all you need is a debug console, use SBI[0].

    Otherwise, get the address from the device tree.

    0. https://github.com/riscv-non-isa/riscv-sbi-doc/blob/master/s...

  • InfluxDB

    Power Real-Time Data Analytics at Scale. Get real-time insights from all types of time series data with InfluxDB. Ingest, query, and analyze billions of data points in real-time with unbounded cardinality.

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  • riscv-acpi

  • riscv-bringup

    Risc-V journey thru containers and new projects

  • Nothing forces it to be in ROM. See for example https://github.com/carlosedp/riscv-bringup/blob/master/unlea... where DRAM init seems to be in the FSBL part which is loaded from the SD card.

NOTE: The number of mentions on this list indicates mentions on common posts plus user suggested alternatives. Hence, a higher number means a more popular project.

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