-
Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis
-
FPGA for Deep Learning: Survey and Future Directions
-
Layout of Rust's u128 and i128 changed
-
Finding the Right "Brain" and Software for Civilian Drone. Part 2
-
Show HN: SatCat5, the open-source FPGA Ethernet switch
-
LumaCode
-
MicroCore – hardware/software co-design environment based on Forth and VHDL
-
Input Output For a custom CPU
-
Efinix PLL question
-
Pluto IIx HDMI Mod not working
-
Waste of money?
-
A really tiny and platform-independent true random number generator for FPGAs and ASICs
-
A really tiny and platform-independent true random number generator for FPGAs and ASICs
-
A really tiny and platform-independent true random number generator for FPGAs and ASICs
-
Show HN: A tiny and platform-agnostic true random number generator for FPGA/ASIC
-
Show HN: A tiny and platform-agnostic true random number generator for FPGA/ASIC
-
Latest N64 Core Download
-
Introducing a Unique FPGA Training Repository: Dive into VHDL - NEXUS!
-
Pluto HDMI for DOL-101 Guide
-
Atari games like it's 1980 with “faithful recreation” of Atari 2600 console
-
AES-128b implementation write-up
-
How to find the pin mapping for connecting Zybo Z7-20 or Nexyx A7 board to a computer over USB-JTAG?
-
Time Card Mini Adds Pi, GPS, and OXCO to Your PC
-
An example of how to add the A ISA extension's LR/SC operations into an open-source architecture
-
Funky Matrix Glitcher with fake CPLD
-
Seeking Help with SDRAM Controller Debugging
-
GHDL
-
USB-Injection: USB device hardware core with modified behaviour capable of injecting transmissions on behalf of other devices
-
Taito SJ core from Anton Gale available
-
Intel discontinues Nios II IP
-
Galaga Arcade port for the Tang Nano 20K
-
OpenXenium FRAG on XeniumOS v2.3.4 or higher
-
Data not being processed by custom Verilog filtering module?
-
GCHD firmware question
-
No video/sound from GameCube using Kaico hdmi converter
-
Modded Xbox keeps powering off every so often when booting up. Everything looks good..am I missing something?
-
Zynq PS PL communication through AXI4
-
Motor drive controller implementation on fpga board
-
Donkey Kong Country running (or rather rolling) on the Analogue Pocket
-
Fully Asynchronous Logic on FPGA
-
Does anyone know if Amazon EC2 F1 instances have FPGA and CPU share memory?
-
NEORV32 - A tiny, customizable and highly extensible MCU-class 32-bit RISC-V microcontroller-like SoC written in platform-independent VHDL
-
NEORV32 - A tiny, customizable and highly extensible MCU-class 32-bit RISC-V microcontroller-like SoC written in platform-independent VHDL
-
NEORV32 - A tiny, customizable and highly extensible MCU-class 32-bit RISC-V microcontroller-like SoC written in platform-independent VHDL
-
NEORV32 - A tiny, customizable and highly extensible MCU-class 32-bit RISC-V microcontroller-like SoC written in platform-independent VHDL
-
Has anyone ever interfaced a dht11 sensor with an FPGA? I'm new to vhdl programming and was looking for some help
-
Replacement parts for custom chips
-
CRC32 algorithm match value between 96 bit wide data bus and 24 bit wide data bus
-
Looking for some help
-
What unofficial cores are you using?