Top 15 Rv32i Open-Source Projects

• darkriscv

  3 1,882 6.3 Verilog

  opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

  

• riscv

  2 1,040 1.8 Verilog

  RISC-V CPU Core (RV32IM)

Project mention: Ultraembedded RISCV Module | /r/RISCV | 2023-08-04

I have been trying to execute some instructions to the ultraembedded riscv module https://github.com/ultraembedded/riscv

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• shecc

  6 1,038 8.7 C

  A self-hosting and educational C optimizing compiler

  

Project mention: A self-hosting and educational C optimizing compiler | news.ycombinator.com | 2024-01-07

Yes, consider the case of shecc. It requires just a handful of C code lines to interpret directives set in the C preprocessor. Unlike relying on existing tools like cpp, as, or ld, shecc stands alone as a minimalist cross-compiler. This design could be particularly beneficial for students delving into the study of compiler construction. See https://github.com/sysprog21/shecc/blob/master/src/lexer.c#L...

• scr1

  2 775 3.3 SystemVerilog

  SCR1 is a high-quality open-source RISC-V MCU core in Verilog

  

• biriscv

  6 749 0.0 Verilog

  32-bit Superscalar RISC-V CPU

Project mention: Need help with designing a basic RISC V processor? | /r/RISCV | 2023-06-21

• riscv-gcc-prebuilt

  1 72 6.8 Shell

  📦 Prebuilt RISC-V GCC toolchains for x64 Linux.

• spu32

  1 60 0.0 C

  Small Processing Unit 32: A compact RV32I CPU written in Verilog

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• RISC-V

  1 42 7.6 Verilog

  Design implementation of the RV32I Core in Verilog HDL with Zicsr extension

Project mention: Prototype Demonstration of a 32-bit RISC-V Softcore with FreeRTOS | /r/FPGA | 2023-06-03

The project repository and the details about the paper can be found here.

• ITA-CORES

  1 33 8.7 Verilog

  RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32

Project mention: SoC RISC-V: An ASIC Implementation of the FEMTORV32 | news.ycombinator.com | 2023-12-20

• risc-v-single-cycle

  1 16 10.0 SystemVerilog

  A Single Cycle Risc-V 32 bit CPU

• mandelbrot_riscv_assembler

  3 16 0.0 Assembly

  An example in bare metal RV32 assembly for the longan nano board

Project mention: RISC-V Assembly projects | /r/RISCV | 2023-07-02

https://github.com/enthusi/mandelbrot_riscv_assembler I have also some other examples, like a lz4 decoder.

• friscv

  1 14 8.4 Coq

  RISCV CPU implementation in SystemVerilog

• ApogeoRV

  1 13 9.3 SystemVerilog

  A RISC-V 32 bits, Out Of Order, single issue with branch prediction CPU, implementing the B, C, M and Zfinx extensions.

• lz4_rv32i_decode

  1 9 0.0 Assembly

  LZ4 decoder in assembly for RiscV RV32IC

• fpga_riscv_cpu

  1 8 1.1 Verilog

  fpga verilog risc-v rv32i cpu

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Rv32i related posts

• Need help with designing a basic RISC V processor?
  5 projects | /r/RISCV | 21 Jun 2023
• Не слабо так у турков бомбануло после сожжения Корана у посольства Турции в Стокгольме
  1 project | /r/tjournal_refugees | 24 Jan 2023
• As an undergrad in my 3rd year with what feels like very little basics down, is implementing a basic RISC-V 5-stage pipelined processor on an FPGA too complex a project for an undergrad student?
  1 project | /r/FPGA | 9 Jan 2022
• Mikron MIK32 – Made in Russia 32-bit RISC-V MCU... for about $6
  1 project | /r/RISCV | 10 Sep 2021
• BiRISC-V – 32-bit Superscalar RISC-V CPU
  1 project | news.ycombinator.com | 20 Jul 2021
• Need help learning how to use risc-v toolchain
  2 projects | /r/FPGA | 22 Jun 2021
• Trying to compile a test program for a NEORV32 FPGA implementation. Strange issue with CSR register in assembler. Any ideas?
  4 projects | /r/RISCV | 7 May 2021
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  www.influxdata.com | 24 Apr 2024

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