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Top 23 Asic Open-Source Projects
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skywater-pdk
Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.
Preferably Intel compatible or able to run Linux? Something I can build in my garage or in a simple microprocessor fab.
https://github.com/google/skywater-pdk
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Project mention: CVA6 – an Application class 6-stage RISC-V CPU capable of booting Linux | news.ycombinator.com | 2023-11-15
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neorv32
:rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
Project mention: An example of how to add the A ISA extension's LR/SC operations into an open-source architecture | /r/RISCV | 2023-07-24 -
Project mention: Clash: A Functional Hardware Description Language | news.ycombinator.com | 2023-12-27
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openlane
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
I would suggest Verilog-to-routing as the best open source tool ive used that deals with abstract circuit representations on an FPGA or similar architecture. but tools like Align and Magical both accept circuit inputs as netlists and have to represent them internally for generating layout so might be easier to understand their approach depending on your familiarity with analog circuits. One more option is to look up OpenLane flow, its more an amalgamation of lots of tools but definitely also represents circuits as a graph for manipulation later on.
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I have been trying to execute some instructions to the ultraembedded riscv module https://github.com/ultraembedded/riscv
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WorkOS
The modern identity platform for B2B SaaS. The APIs are flexible and easy-to-use, supporting authentication, user identity, and complex enterprise features like SSO and SCIM provisioning.
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axi
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
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ara
The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core (by pulp-platform)
Project mention: x86 vs ARM; Vector and Matrix Extensions; How do they compare? | /r/hardware | 2023-12-09yeah, ara also currently doesn't work, but that it exist is already really cool, and will likely get fixed and completed in the future
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Project mention: MemPool: Many-core image processor based on RISC-V with Shared L1 cache | news.ycombinator.com | 2023-04-11
I don't get it:
https://github.com/pulp-platform/mempool/blob/main/software/...
How is that mapping to cores happening? I see indexing by core id for the multiply but how does it magically end up running on a specific core? Magic compiler?
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open-register-design-tool
Tool to generate register RTL, models, and docs using SystemRDL or JSpec input
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Project mention: A really tiny and platform-independent true random number generator for FPGAs and ASICs | /r/cryptography | 2023-11-06
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SaaSHub
SaaSHub - Software Alternatives and Reviews. SaaSHub helps you find the best software and product alternatives
Asic related posts
- Ask HN: Open-Source Simple CPU?
- SERV – The SErial RISC-V CPU
- x86 vs ARM; Vector and Matrix Extensions; How do they compare?
- CVA6 – an Application class 6-stage RISC-V CPU capable of booting Linux
- Ara2: RVV 1.0 Compliant Open-Source Processor
- Libre Silicon – Free semiconductors for everyone
- Ask HN: How to start a fabless chip company targeting a modern process node?
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Index
What are some of the best open-source Asic projects? This list will help you:
Project | Stars | |
---|---|---|
1 | skywater-pdk | 2,806 |
2 | cva6 | 2,029 |
3 | neorv32 | 1,390 |
4 | clash-ghc | 1,359 |
5 | serv | 1,228 |
6 | openlane | 1,139 |
7 | riscv | 1,040 |
8 | axi | 902 |
9 | biriscv | 749 |
10 | vunit | 674 |
11 | gf180mcu-pdk | 333 |
12 | tensil | 319 |
13 | ara | 296 |
14 | esp | 284 |
15 | surf | 277 |
16 | rggen | 274 |
17 | mempool | 224 |
18 | systemrdl-compiler | 220 |
19 | livehd | 195 |
20 | open-register-design-tool | 179 |
21 | skillbridge | 157 |
22 | neoTRNG | 145 |
23 | pygears | 142 |