Eater-sap-1-improvements Alternatives

eater-sap-1-improvements reviews and mentions

• Next project for my PUTEY-1 TTL CPU: A speech synthesizer!
  1 project | /r/beneater | 30 Dec 2022

  When I figure out why the "voice" is unintelligible, I will be certainly posting all the details and making a video as I have done with my prior projects for this computer. Subscribe to my YouTube or follow my GitHub repository to get alerts.

• It took about a week, but my PUTEY-1 TTL CPU has calculated all the prime numbers to about 1.1 million.
  3 projects | /r/beneater | 4 Jun 2022

  The details of my design evolution from the Eater SAP-1 to what you see here are documented at my GitHub repository. You can also watch video overviews if each improvement project at my YouTube channel, the I haven’t yet made the video for the ALU that’s enabling multiplication and division through bit shifting. That’s only at my GitHub at the moment.

• My TTL CPU is now operating at 300 KHz clock and can calculate 32 bit prime numbers.
  1 project | /r/beneater | 27 May 2022

  Ha ... yeah, it was overkill, but the 32K was just sitting there unused. If you check out my code for the prime number calculation, you'll see the stack is well used. However, I haven't cracked the 256 byte depth yet.

• has anyone programmed an EPLD?
  1 project | /r/beneater | 8 May 2022

  I am using the ATF22V10C in my build. Works great. I’ve made some notes on programming them here: https://github.com/michaelkamprath/eater-sap-1-improvements/tree/advanced-alu/advanced-alu/pld-files

• I’ve built out my ALU upgrade for my TTL CPU. I use 74LS382 function generators, 74LS194 bit shifters, and 74LS682 comparators to significantly upgrade what can be computed from the original 74LS283 4-bit adders.
  1 project | /r/beneater | 6 May 2022
• 8-bit CPU project upgrading
  1 project | /r/beneater | 18 Feb 2022

  I’ve done a number of upgrades myself. They are documented here: https://github.com/michaelkamprath/eater-sap-1-improvements

• Stuck with strange voltage behavior in RAM module that goes away when using a multimeter
  1 project | /r/beneater | 17 Dec 2021

  Here's the write button. https://i.imgur.com/N3WgqR9.jpg I've inverted it from a pull-up switch to GND, to a pull-down switch to VCC, using Michael Kamprath's improvement recommendations found at https://github.com/michaelkamprath/eater-sap-1-improvements/tree/main/improving-reliability-of-ram-module

• The next iteration of my extend breadboard TTL CPU is working. Time to finish project documentation and create an overview video.
  1 project | /r/beneater | 25 Aug 2021

  This iteration on the CPU focused on implementing a 8-bit instruction register. However, doing this required me to rethink many parts of the computer, notably the memory map and the control logic. Details on what I accomplished in this project can be found in my GitHub repository: https://github.com/michaelkamprath/eater-sap-1-improvements/tree/main/instruction-register-8-bit

• My updated 16 bit memory + updated control logic + memory map controller + 8 bit instruction register is ready to be integrated into my breadboard CPU.
  2 projects | /r/beneater | 16 Aug 2021

  If you want to read up on what I am doing here before I create a video on it, I have documented everything here (though there are a few bits I still need to document).

• The start of my effort to add 16-bit memory addressing to my SAP-1. Built so far at 16-bit program counter, memory address register, and run mode selector. The design now has a proper address bus (purple wires) in addition to the 8-bit data bus.
  1 project | /r/beneater | 11 Apr 2021

  You can check out the current state of my design on my ram-upgrade branch in my GitHub repository. It's still a work in progress, so don't yet expect the same level of documentation or completeness my other modules have.

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