quasiSoC

No-MMU Linux capable RISC-V SoC designed to be useful. (by regymm)

quasiSoC Alternatives

Similar projects and alternatives to quasiSoC based on common topics and language

  • Toast-RV32i

    Pipelined RISC-V RV32I Core in Verilog

  • spu32

    Small Processing Unit 32: A compact RV32I CPU written in Verilog

  • InfluxDB

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  • chipyard

    An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

  • RVVM

    The RISC-V Virtual Machine

  • RISCV

    Discontinued A Pipelined RISC-V RV32I Core in Verilog [Moved to: https://github.com/georgeyhere/Toast-RV32i] (by georgeyhere)

  • rt-thread

    RT-Thread is an open source IoT real-time operating system (RTOS).

  • neorv32

    :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

  • WorkOS

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NOTE: The number of mentions on this list indicates mentions on common posts plus user suggested alternatives. Hence, a higher number means a better quasiSoC alternative or higher similarity.

quasiSoC reviews and mentions

Posts with mentions or reviews of quasiSoC. We have used some of these posts to build our list of alternatives and similar projects.

Stats

Basic quasiSoC repo stats
1
85
6.6
3 months ago

regymm/quasiSoC is an open source project licensed under GNU General Public License v3.0 only which is an OSI approved license.

The primary programming language of quasiSoC is C.


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