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Playing around "Less Slow" coding practices in Rust, from numerical micro-kernels to coroutines, ranges, and polymorphic state machines
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NOTE:
The number of mentions on this list indicates mentions on common posts plus user suggested alternatives.
Hence, a higher number means a better less_slow.cpp alternative or higher similarity.
less_slow.cpp discussion
less_slow.cpp reviews and mentions
Posts with mentions or reviews of less_slow.cpp.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2025-09-19.
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Processing Strings 109x Faster Than Nvidia on H100
Yes, at the scale of 128-bit registers NEON is mostly enough, except for a few categories of instructions missing in that ISA subset, like scatter/gather ops, that can yield 30% boost over serial memory accesses: https://github.com/ashvardanian/less_slow.cpp/releases/tag/v...
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Faster sorting with SIMD CUDA intrinsics
Thanks, appreciate the gesture :)
Traditional SWAR on GPUs is a fascinating topic. I've begun assembling a set of synthetic benchmarks to compare DP4A vs. DPX (<https://github.com/ashvardanian/less_slow.cpp/pull/35>), but it feels incomplete without SWAR. My working hypothesis is that 64-bit SWAR on properly aligned data could be very useful in GPGPU, though FMA/MIN/MAX operations in that PR might not be the clearest showcase of its strengths. Do you have a better example or use case in mind?
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Ask HN: What is the most interesting thing you've learned lately?
Lately I've been going through [less_slow.cpp](https://github.com/ashvardanian/less_slow.cpp) and learning about different performance oriented c++ coding practices.
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Show HN: Less Slow C++
* 7-bit representations.
Here is that section in the repo: <https://github.com/ashvardanian/less_slow.cpp/blob/8f32d65cc...>.
- Show HN: Less Slow C++: Revisiting Performance Tricks for C/C++/CUDA/Asm/PTX
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DeepGEMM: Clean and efficient FP8 GEMM kernels with fine-grained scaling
I generally avoid FP8 and prefer I8, but your question got me wondering how well cuBLAS performs.
First of all, cuBLAS needs the cuBLASLt extension API for mixed-precision workloads to handle FP8. Second, some adequate type combinations, like E5M2 x E5M2 for A x B, are not supported, while others, like E5M2 x E4M3, are! Moreover, matrix A must always come in a transposed layout for Ampere, Hopper, and Blackwell... and the list of constraints goes on.
I've integrated FP8 cuBLASLt benchmarks into my "Less Slow C++" repository <https://github.com/ashvardanian/less_slow.cpp>, adding to the list of existing cuBLAS and hand-rolled CUDA and PTX benchmarks. I'm running them on H200 GPUs, which should have the same performance as H100. For square inputs, the throughput peaks around 1.35 Peta-ops.
That's around 67% of the advertised number for dense GEMM <https://resources.nvidia.com/en-us-data-center-overview-mc/e...>.
- Release Less Slow CPP v0.6: Thrust → CUDA → PTX → SASS
- Learning to Write Less Slow C, C++, and Assembly Code
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A note from our sponsor - AppSignal
www.appsignal.com | 9 Aug 2026
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ashvardanian/less_slow.cpp is an open source project licensed under Apache License 2.0 which is an OSI approved license.
The primary programming language of less_slow.cpp is C++.
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