kronos

Kronos is a 3-stage in-order RISC-V RV32I_Zicsr_Zifencei core geared towards FPGA implementations (by SonalPinto)
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Source Code
sonalpinto.github.io
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kronos reviews and mentions

Posts with mentions or reviews of kronos. We have used some of these posts to build our list of alternatives and similar projects.
  • Interrupts and Priveledged Instructions
    1 project | /r/RISCV | 11 Mar 2021
    I'm using this core and it seems to support interrupts - but I'm not sure how to enable them and get going. I'm familiar with what interrupts are and how they get going, I've got my peripherals hooked up and addressable in memory where I can go read the status of buttons and switches, but now I want to be able to have them pull an interrupt line high (I believe I want external interrupt) and the software to jump to a handler routine.

Stats

Basic kronos repo stats
1
59
0.0
11 months ago

SonalPinto/kronos is an open source project licensed under Apache License 2.0 which is an OSI approved license.

The primary programming language of kronos is SystemVerilog.


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