MandelbrotInVHDL

What better way to learn VHDL, than to do some fractals? (by ttsiodras)

MandelbrotInVHDL reviews and mentions

Posts with mentions or reviews of MandelbrotInVHDL. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2021-02-20.
  • 3.6 times speedup - via my first ever pipelining
    2 projects | /r/FPGA | 20 Feb 2021
    The ZestSC1 has the necessary IP allowing me to do this ( https://github.com/ttsiodras/MandelbrotInVHDL/blob/master/FPGA-VHDL/Example3.vhd#L501 ). Basically, once the pipelined stage is done - and the computed frame is therefore stored in SRAM - I iterate over all computed pixel colors, and write them (two at a time) over the 16-bit interface. On the SW side, the ZestSC1ReadData API maps the data into host RAM, from where libSDL blits them to the screen.

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Basic MandelbrotInVHDL repo stats
2
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0.0
about 3 years ago

ttsiodras/MandelbrotInVHDL is an open source project licensed under GNU General Public License v3.0 only which is an OSI approved license.

The primary programming language of MandelbrotInVHDL is VHDL.


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