Verilog development and verification project for HOL4 (by CakeML)

Hardware Alternatives

Similar projects and alternatives to hardware based on common topics and language

  • GitHub repo cakeml

    CakeML: A Verified Implementation of ML

  • GitHub repo NyuziProcessor

    GPGPU microprocessor architecture

  • GitHub repo clash-ghc

    Haskell to VHDL/Verilog/SystemVerilog compiler

  • GitHub repo platformio-vscode-ide

    PlatformIO IDE for VSCode: The next generation integrated development environment for IoT

  • GitHub repo verismith

    Verilog Fuzzer to test the major simulators and sythesisers by generating random, valid Verilog.

  • GitHub repo PlatformIO

    PlatformIO is a professional collaborative platform for embedded development :alien: A place where Developers and Teams have true Freedom! No more vendor lock-in!

  • GitHub repo chisel3

    Chisel 3: A Modern Hardware Design Language

NOTE: The number of mentions on this list indicates mentions on common posts. Hence, a higher number means a better hardware alternative or higher similarity.


Posts where hardware has been mentioned. We have used some of these posts to build our list of alternatives and similar projects.
  • Lutsig - A verified Verilog synthesizer
    reddit.com/r/FPGA | 2021-01-11
    All source code and proofs are available on Github: https://github.com/CakeML/hardware. However, if you are not familiar with the HOL4 theorem prover it's not entirely straightforward to run Lutsig since you currently have to run Lutsig inside the theorem prover.


Basic hardware repo stats
2 months ago

CakeML/hardware is an open source project licensed under BSD 3-clause "New" or "Revised" License which is an OSI approved license.