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InfluxDB
InfluxDB – Built for High-Performance Time Series Workloads. InfluxDB 3 OSS is now GA. Transform, enrich, and act on time series data directly in the database. Automate critical tasks and eliminate the need to move data externally. Download now.
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zlib-ng: https://github.com/zlib-ng/zlib-ng/blob/develop/functable.c
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libjpeg-turbo: https://github.com/libjpeg-turbo/libjpeg-turbo/blob/main/simd/x86_64/jsimdcpu.asm
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libwebp
Mirror only. Please do not send pull requests. See https://chromium.googlesource.com/webm/libwebp/+/HEAD/CONTRIBUTING.md.
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Bullet
Bullet Physics SDK: real-time collision detection and multi-physics simulation for VR, games, visual effects, robotics, machine learning etc.
Bullet: https://github.com/bulletphysics/bullet3/blob/5ae9a15ecac7bc7e71f1ec1b544a55135d7d7e32/src/LinearMath/btCpuFeatureUtility.h
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SaaSHub
SaaSHub - Software Alternatives and Reviews. SaaSHub helps you find the best software and product alternatives
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This WASM SIMD instruction table is a bit outdated (doesn't show the bitmask instructions I mentioned in the article), but can still give you a pretty good picture about the differences. There are many instructions that map 1:1 to an actual x86 instruction but need several on ARM, and vice versa.
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I hope so, after all if glibc can get away with that with their ifunc-based dispatch (although for a very limited set of APIs), I assumed I could too. I only know about one case where CPU features differed among cores and it wasn't recognized as a good idea :) I would probably collect a lowest common denominator across all cores in that case.
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