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This WASM SIMD instruction table is a bit outdated (doesn't show the bitmask instructions I mentioned in the article), but can still give you a pretty good picture about the differences. There are many instructions that map 1:1 to an actual x86 instruction but need several on ARM, and vice versa.
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I hope so, after all if glibc can get away with that with their ifunc-based dispatch (although for a very limited set of APIs), I assumed I could too. I only know about one case where CPU features differed among cores and it wasn't recognized as a good idea :) I would probably collect a lowest common denominator across all cores in that case.