ASIC roundup of open source RISC-V CPU cores

• black-parrot

  5 525 8.4 SystemVerilog

  A Linux-capable RISC-V multicore for and by the world

  

Whoops, read the blog “no sram”. Would love to get my project https://github.com/black-parrot/black-parrot/tree/master on there. Do you have a sense for how many instances your flow could support? We use hardened srams for our caches which are minimally 8kB each at the moment.

• neorv32

  77 1,415 9.9 C

  :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

Would love to see more RISC-V CPUs/SoCs from RISC-V Exchange - especially the NEORV32 ;)

• WorkOS

  workos.com sponsored

  The modern identity platform for B2B SaaS. The APIs are flexible and easy-to-use, supporting authentication, user identity, and complex enterprise features like SSO and SCIM provisioning.

  

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