ASIC roundup of open source RISC-V CPU cores

This page summarizes the projects mentioned and recommended in the original post on reddit.com/r/RISCV
#risc-v #soft-core #Vhdl #Hardware #Fpga

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  • black-parrot

    A Linux-capable RISC-V multicore for and by the world

    Whoops, read the blog “no sram”. Would love to get my project https://github.com/black-parrot/black-parrot/tree/master on there. Do you have a sense for how many instances your flow could support? We use hardened srams for our caches which are minimally 8kB each at the moment.

  • neorv32

    :desktop_computer: A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

    Would love to see more RISC-V CPUs/SoCs from RISC-V Exchange - especially the NEORV32 ;)

  • Scout APM

    Less time debugging, more time building. Scout APM allows you to find and fix performance issues with no hassle. Now with error monitoring and external services monitoring, Scout is a developer's best friend when it comes to application development.

NOTE: The number of mentions on this list indicates mentions on common posts plus user suggested alternatives. Hence, a higher number means a more popular project.

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