Is there any documentation relates to the riscv-gnu-toolchain ?

• neorv32

  77 1,415 9.9 C

  :rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

In most cases the start-up code (called crt0) is responsible of doing all the required (hardware) initialization before the C-runtime can take over (setting up the stack pointer, initializing hardware, preparing certain memory sections and so on). Here is an example of one exemplary crt0 start-up code: https://github.com/stnolting/neorv32/blob/master/sw/common/crt0.S

• riscv-asm-manual

  8 1,347 3.7

  RISC-V Assembly Programmer's Manual

  

• WorkOS

  workos.com sponsored

  The modern identity platform for B2B SaaS. The APIs are flexible and easy-to-use, supporting authentication, user identity, and complex enterprise features like SSO and SCIM provisioning.

  

• riscv-c-api-doc

  1 58 7.2

  Documentation of the RISC-V C API

  

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