How to use a RISC V core for other purposes?

This page summarizes the projects mentioned and recommended in the original post on reddit.com/r/RISCV

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  • GitHub repo chipyard

    An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

  • GitHub repo neorv32

    :desktop_computer: An area-optimized, customizable MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

    How about this one https://github.com/stnolting/neorv32

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NOTE: The number of mentions on this list indicates mentions on common posts plus user suggested alternatives. Hence, a higher number means a more popular project.

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