Verilog security-hardening

Open-source Verilog projects categorized as security-hardening

Topics: operating-system Fpga research-project system-on-chip fpga-soc

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Verilog security-hardening Projects

antikernel

2 110 0.0 Verilog

The Antikernel operating system project
WorkOS

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The modern identity platform for B2B SaaS. The APIs are flexible and easy-to-use, supporting authentication, user identity, and complex enterprise features like SSO and SCIM provisioning.

NOTE: The open source projects on this list are ordered by number of github stars. The number of mentions indicates repo mentiontions in the last 12 Months or since we started tracking (Dec 2020).

Verilog security-hardening related posts

Check out this state machine reading+writing /dev/stdin and stdout from an FPGA to play a little guessing game at the console. Code in comments.
3 projects | /r/FPGA | 14 Jul 2021
AMD Patent Reveals Hybrid CPU-FPGA Design That Could Be Enabled By Xilinx Tech
12 projects | /r/FPGA | 4 Jan 2021

Index

	Project	Stars
1	antikernel	110

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