wbicapetwo
Wishbone to ICAPE interface conversion (by ZipCPU)
wbscope
A wishbone controlled scope for FPGA's (by ZipCPU)
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| wbicapetwo | wbscope | |
|---|---|---|
| 2 | 1 | |
| 8 | 70 | |
| - | - | |
| 0.0 | 3.7 | |
| about 4 years ago | 3 months ago | |
| Verilog | Verilog | |
| - | - |
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.
wbicapetwo
Posts with mentions or reviews of wbicapetwo.
We have used some of these posts to build our list of alternatives
and similar projects.
- Can an FPGA program itself?
-
Xilinx ICAP issues
Perhaps an example design using the ICAPE2 port might help?
wbscope
Posts with mentions or reviews of wbscope.
We have used some of these posts to build our list of alternatives
and similar projects. The last one was on 2021-07-10.
-
Working with FPGAs (Questions)
One of my first projects on my own was a design that allowed me to interact with a bus from an external UART. I then built my own internal logic analyzer. From these humble beginnings, I fairly well insulated myself from the vendor architectures out there since I can do all of my design in Verilog.
What are some alternatives?
When comparing wbicapetwo and wbscope you can also consider the following projects:
openarty - An Open Source configuration of the Arty platform
zipcpu - A small, light weight, RISC CPU soft core
biriscv - 32-bit Superscalar RISC-V CPU
dpll - A collection of phase locked loop (PLL) related projects
wbuart32 - A simple, basic, formally verified UART controller
sdspi - SD-Card controller, using either SPI, SDIO, or eMMC interfaces
tree
wb2axip - Bus bridges and other odds and ends