stm32-rs
rustc_codegen_cranelift
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stm32-rs | rustc_codegen_cranelift | |
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8 | 44 | |
1,164 | 1,434 | |
3.6% | 5.2% | |
8.9 | 9.7 | |
7 days ago | 5 days ago | |
Python | Rust | |
Apache License 2.0 | Apache License 2.0 |
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stm32-rs
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STM32F4 Embedded Rust at the PAC: svd2rust
Developing code at the PAC, well, requires a PAC crate for the targeted controller. For the STM32 there exists a repo for all the supported PACs. These PACs are all generated using a command line tool called svd2rust. svd2rust grabs what is called an svd file and converts it into a PAC exposing API allowing access to peripheral registers. An SVD file is an Extensible Markup Language (XML) formatted file describing the hardware features of a device, listing all the peripherals and the registers associated with them. SVD files typically are released by microcontroller manufacturers.
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Next Rust Compiler
In real world software, 99% of code is gluing preexisting lower-level functions together. In C/C++, the unsafe is implicit and needlessly covers everything. In Rust, the unsafe is only needed for the 1%.
You can safely implement a doubly-linked list in Rust, using unsafe, and that list can offer a safe interface so that the next higher level of code does not need to use unsafe. In fact, one doubly-linked list implementation that provides a safe interface is in the Rust standard library: https://doc.rust-lang.org/std/collections/struct.LinkedList.... . Most people do not rewrite std::list in C++ either.
Much of the Linux kernel really is the same: normal C code (maybe slightly more complicate than average userspace code, and definitely more carefully reviewed, but definitely not magic), that depends on extra carefully written lower level primitives that are _much_ more complicated internally than they appear from the outside (like the memory allocator, printk, RCU, etc.).
Rust is powerful enough to have libraries for register level access to micro-controllers (e.g. https://github.com/stm32-rs/stm32-rs), that encode moderately complex access rules safely in the type system (e.g. which specific set of bits is read-only or write-only, with which particular values (with nice human-readable names, even!), in which particular states of a state machine depending on other bits), all while allowing bypassing the restrictions with a simple unsafe keyword without even giving up on the nice API.
On the C/C++ side, I've used libopencm3, MBED, CMSIS, and everyone's favorite toy, Arduino. They're, in different ways, all much more mature and complete than anything Rust has today, but nothing comes even remotely close to Rust in terms of safety and long term potential.
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NVIDIA Security Team: “What if we just stopped…
Packages: Where would I start with e.g. running Ada on a stm32? Resources are just a bit tough to find, and there's only a single stm32 package on Alire (which was inspired by cargo). But Rust has easy to find PACs and HALs for everything in the family, plus an official guide to setting up a project, including HIL debugging and unit testing on qemu, that takes about 15 minutes.
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Cloning a Rare ISA Card to Use a Rare CD Drive
> (I threw out all my C/C++ books about 15 years ago - oops!).
The future is here for STM32: https://github.com/stm32-rs/stm32-rs
- Is there a database of peripheral implementations for different STM32 MCU parts?
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Writing embedded firmware using Rust
Specifically these Rust register definitions are being auto-generated using SVD files published by the chip vendors (https://www.keil.com/pack/doc/CMSIS/SVD/html/index.html). For stm32 for example there are the auto-generated register definitions: https://github.com/stm32-rs/stm32-rs and then the HAL layers on top that try to build easy to use tools on top of the registers (e.g. an SPI or USART type with write and read functions). e.g. https://github.com/stm32-rs/stm32f4xx-hal for the stm32f4xx line
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Any frameworks in Rust for developing on SiFive / ST / NXP boards?
For STM32, check out the Peripheral Access Crates by the stm32-rs ream. For higher-level access, I wrote This HAL library for STM32. Works on most newer variants, and includes examples for specific peripherals, and simple applications.
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CMSIS libraries
Patches: https://github.com/stm32-rs/stm32-rs/tree/master/devices
rustc_codegen_cranelift
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Cranelift code generation comes to Rust
Windows is supported. See https://github.com/rust-lang/rustc_codegen_cranelift/issues/....
- What part of Rust compilation is the bottleneck?
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A Guide to Undefined Behavior in C and C++
> When this happens, it seems like it'll be possible to get the LLVM bits out of the bootstrap process and lead to a fully self-hosted Rust.
What do you mean by "when this happens"? GP's point is that this has already happened: the Cranelift backend is feature-complete from the perspective of the language [0], except for inline assembly and unwinding on panic. It was merged into the upstream compiler in 2020 [1], and a compiler built with only the Cranelift backend is perfectly capable of building another compiler. LLVM hasn't been a necessary component of the Rust compiler for quite some time.
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What are some stuff that Rust isn't good at?
Note that the Cranelift codegen will eventually become standard for debug builds to speed them up.
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Rust port of B3 from WebKit, LLVM-like backend
Maybe one day we'll have rustc b3 backend like what they did with Cranelift
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Any alternate Rust compilers?
Additionally, there is gcc codegen for rustc (https://github.com/rust-lang/rustc_codegen_gcc), which is not a compiler per se, but an alternative code generator, with more architectures supported and other nice things. It's also coming along, but there's still a lot of work to do there too. There's also Cranelift codegen (https://github.com/bjorn3/rustc_codegen_cranelift), which is designed to make debug builds faster, but this is not as exciting/useful as the other 2.
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Capsules, reactive state, and HSR: Perseus v0.4.0 goes stable!
For the instant reloading, that's in Sycamore, so you should speak to its devs, but as for the alternative compiler backend, it's not my project, but it uses Cranelift and works pretty well! See https://github.com/bjorn3/rustc_codegen_cranelift for details.
- Security Engineer looking for ways to see if any of my tasks could slowly be ported to Rust or should I just stick with Python.
- Rust is now officially supported on some Infineon microcontrollers! (more to come later this year)
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Improving Rust compile times to enable adoption of memory safety
The more immediate goal of "distribute the cranelift backend as a rustup component" has been making good progress and seems like it might happen relatively soon https://github.com/bjorn3/rustc_codegen_cranelift/milestone/...
What are some alternatives?
libopencm3 - Open source ARM Cortex-M microcontroller library
wasmtime - A fast and secure runtime for WebAssembly
stm32-hal - This library provides access to STM32 peripherals in Rust.
gccrs - GCC Front-End for Rust
stm32f4xx-hal - A Rust embedded-hal HAL for all MCUs in the STM32 F4 family
sccache - Sccache is a ccache-like tool. It is used as a compiler wrapper and avoids compilation when possible. Sccache has the capability to utilize caching in remote storage environments, including various cloud storage options, or alternatively, in local storage.
hubris - A lightweight, memory-protected, message-passing kernel for deeply embedded systems.
tch-rs - Rust bindings for the C++ api of PyTorch.
probe-run - Run embedded programs just like native ones
cranelift-jit-demo - JIT compiler and runtime for a toy language, using Cranelift
esp32 - Peripheral access crate for the ESP32
mrustc - Alternative rust compiler (re-implementation)