soft_riscv
litex
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| soft_riscv | litex | |
|---|---|---|
| 1 | 29 | |
| 4 | 2,672 | |
| - | - | |
| 0.0 | 9.7 | |
| over 2 years ago | 3 days ago | |
| C | C | |
| - | GNU General Public License v3.0 or later |
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soft_riscv
litex
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FPGA Dev Boards for $150 or Less
https://github.com/enjoy-digital/litex
they have tutorials, you can get compatible boards for around $20
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Need help to build a RISC-V Processor on Artix-7 FPGA: Final Year Engineering Project Guide
With LiteX you can synthesize a VexRiscV processor. You can run Linux on it. The toolchain is pretty easy to use, as long as you use Xilinx Vivado to compile to gateware.
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Sunset TCL scripts ?
LiteX is a great example of a Python-first flow. However, they have chosen not to subordinate the scripting environment to a GUI toolchain - EDA vendors are unlikely to choose the same trade.
- synthesizing and using the Ibex RISC-V core
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Been messing around with litex and migen on my Tang Primer 20K
To lean these: https://github.com/enjoy-digital/litex, https://github.com/m-labs/migen
- CPU design for college project
- How can I learn about RISC-V and use case? I want to do a project for begginers
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How Much Would It Cost For A Truly Open Source RISC-V SOC?
If you use LiteX to generate a VexRiscV system-on-a-chip, you can include an open source DDR DRAM PHY. This works on Xilinx Spartan-6, Spartan7Artix7/Kintex7/Virtex7 FPGAs, and Lattice ECP5 FPGAs. DDR/LPDDR/DDR2/DDR3 depending on the FPGA.
- LiteX: Build Hardware Easily
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Using FPGAs for computations as a beginner
I am interested in trying out FPGAs for the purpose of running specific calculations more efficiently. Since the calculations themselves are quite complex, I would need to be able to program in a relatively high-level language. I've seen that designing SoC in Python is possible, for example with Litex (https://github.com/enjoy-digital/litex) or Amaranth (https://github.com/amaranth-lang/). I don't want to spend hundreds of hours learning about FPGAs, but I'm prepared to take on a challenge.
What are some alternatives?
verilog-ethernet - Verilog Ethernet components for FPGA implementation
nmigen-tutorial - A tutorial for using nmigen
verilog-wishbone - Verilog wishbone components
SpinalHDL - Scala based HDL
corundum - Open source FPGA-based NIC and platform for in-network compute
fusesoc - Package manager and build abstraction tool for FPGA/ASIC development
WARP_Core - Wilson AXI RISCV Processor Core
SaxonSoc - SoC based on VexRiscv and ICE40 UP5K
satcat5 - SatCat5 is a mixed-media Ethernet switch that lets a variety of devices communicate on the same network.
openwifi - open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software
litedram - Small footprint and configurable DRAM core