serv VS riscv_verilator_model

Compare serv vs riscv_verilator_model and see what are their differences.

serv

SERV - The SErial RISC-V CPU (by olofk)

riscv_verilator_model

RISCV model for Verilator/FPGA targets (by aignacio)
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serv riscv_verilator_model
16 2
911 30
- -
6.5 0.0
about 1 month ago over 3 years ago
Verilog C
ISC License Apache License 2.0
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.

serv

Posts with mentions or reviews of serv. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2022-11-11.

riscv_verilator_model

Posts with mentions or reviews of riscv_verilator_model. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2021-08-29.

What are some alternatives?

When comparing serv and riscv_verilator_model you can also consider the following projects:

neorv32 - 🖥️ A tiny, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.

riscv-cores-list - RISC-V Cores, SoC platforms and SoCs

fusesoc - Package manager and build abstraction tool for FPGA/ASIC development

edalize - An abstraction library for interfacing EDA tools

zipversa - A Versa Board implementation using the AutoFPGA/ZipCPU infrastructure

ContrAlto - This repository contains the source code for Living Computers: Museum+Labs's Xerox Alto emulator, ContrAlto.

IronOS - Open Source Soldering Iron firmware for Miniware and Pinecil

OpenTimer - A High-performance Timing Analysis Tool for VLSI Systems

glacial - Glacial - microcoded RISC-V core designed for low FPGA resource utilization

neo430 - :computer: A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.

panologic - PanoLogic Zero Client G1 reverse engineering info