qucs_s VS hardcaml

Compare qucs_s vs hardcaml and see what are their differences.

qucs_s

Qucs-S is a circuit simulation program with Qt-based GUI (by ra3xdh)

hardcaml

Hardcaml is an OCaml library for designing hardware. (by janestreet)
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qucs_s hardcaml
10 7
710 611
- 2.6%
9.7 6.3
5 days ago 11 days ago
C++ OCaml
GNU General Public License v3.0 only MIT License
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.

qucs_s

Posts with mentions or reviews of qucs_s. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2023-08-02.

hardcaml

Posts with mentions or reviews of hardcaml. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2022-12-27.
  • Zero Knowledge FPGAs
    2 projects | news.ycombinator.com | 27 Dec 2022
    title: Accelerating zk-SNARKs - MSM and NTT algorithms on FPGAs with Hardcaml

    Any reason the title deviates so much from original? Is it because of all the cool acronyms and code words? Here's a decoder:

    zk-SNARK: zero-knowledge Succinct Non-Interactive Argument of Knowledge

    MSM: Multi-Scalar Multiplication

    Hardcaml: OCaml lib for hardware: https://github.com/janestreet/hardcaml

    NTT: Number Theoretic Transform

  • A circuit simulator that doesn't look like it was made in 2003
    5 projects | news.ycombinator.com | 14 Dec 2022
    Perhaps peripheral (the original site has been hugged to death).

    Both clashlang: https://clash-lang.org/

    And Hardcaml: https://github.com/janestreet/hardcaml

    have personally fueled my interest in hardware.

    Dan Luu speaks eloquently and at length about how better options are needed for logic design. I would recommend both of the above to the enthusiastic novice.

  • Functional programming language for embedded devices?
    6 projects | /r/functionalprogramming | 29 Nov 2022
  • HRT or Jane Street?
    1 project | /r/csMajors | 16 Aug 2022
    Join JS and you can program FPGAs in a strongly typed, expressive, high level programming language (OCaml): https://github.com/janestreet/hardcaml
  • You need to stop idolizing programming languages.
    5 projects | /r/programming | 12 Apr 2022
    [1] https://github.com/janestreet/hardcaml
  • Designing a MIPS CPU in Hardcaml (12 part series)
    1 project | news.ycombinator.com | 8 Nov 2021
    > You can put all the functions/tasks you want in that module.

    Coming from a software background, the testing strategies available in Verilog seem very clunky and overly verbose. In comparison, Hardcaml's ASCII waveform expect-test solution feels extremely elegant and simple: https://blog.janestreet.com/using-ascii-waveforms-to-test-ha....

    > And all of my development and that of my team happens through gitlab-CI.

    That's probably more of a gap in my education than a fault of the ecosystem then.

    ---

    Among other qualities, I prefer languages that let fewer mistakes slip through, and allow the developer to focus on the system they intend to build rather than avoiding bugs/misunderstandings that would be easy to catch otherwise. You bring up a lot of really good points, and I suspect that if we were doing Verilog "the right way", we would have probably run into fewer issues. But at the end of the day, developing in Hardcaml was a much more ergonomic experience: testing was straightforward, most "stupid mistakes" were impossible, setup was pretty easy, and the library provided a lot of really useful abstractions. For example, Hardcaml interfaces make it easy to represent practically any data structure that can be serialized to/from a bit vector, and the Always API allows for some pretty interesting non-trivial functional logic.

    https://github.com/janestreet/hardcaml/blob/master/docs/hard...

  • Hardcaml MIPS CPU Learning Project and Blog
    2 projects | /r/FPGA | 1 Jul 2021
    A few months ago, I came across the Signals and Threads Programmable Hardware episode. I really liked the idea of Hardcaml: a library to write and test hardware designs in OCaml. Representing circuits as functions felt like a good abstraction, and I’ve been wanting to learn OCaml for a while.

What are some alternatives?

When comparing qucs_s and hardcaml you can also consider the following projects:

gerbolyze - Directly render SVG overlays into Gerber and Excellon files

bitvec - A crate for managing memory bit by bit

ktechlab - an IDE for microcontrollers and electronics

bap - Binary Analysis Platform

Arduino_Amplified - Welcoming all Electronics enthusiasts and Learners to contribute and learn this HacktoberFest21.

nerves - Craft and deploy bulletproof embedded software in Elixir

Simon-Arduino - Interactive hardware game based on memorizing blink pattern

nerves_system_osd32mp1 - Base system for Octavo OSD32MP1

dice - Digital Image Correlation Engine (DICe): a stereo DIC application that runs on Mac, Windows, and Linux

clash-ghc - Haskell to VHDL/Verilog/SystemVerilog compiler

qelectrotech-source-mirror - Main QET repository, Bugtracker: https://qelectrotech.org/bugtracker/

logisim-evolution - Digital logic design tool and simulator