neorv32 VS VexRiscv

Compare neorv32 vs VexRiscv and see what are their differences.

neorv32

:rocket: A tiny, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL. (by stnolting)

VexRiscv

A FPGA friendly 32 bit RISC-V CPU implementation (by SpinalHDL)
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neorv32 VexRiscv
77 21
1,397 2,214
- 2.8%
9.9 7.6
1 day ago 3 days ago
VHDL Assembly
BSD 3-clause "New" or "Revised" License MIT License
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.

neorv32

Posts with mentions or reviews of neorv32. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2023-03-08.

VexRiscv

Posts with mentions or reviews of VexRiscv. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2023-10-23.

What are some alternatives?

When comparing neorv32 and VexRiscv you can also consider the following projects:

linux-on-litex-vexriscv - Linux on LiteX-VexRiscv

ibex - Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

picoMIPS - picoMIPS processor doing affine transformation

RISCV-FiveStage - Marginally better than redstone

wb2axip - Bus bridges and other odds and ends

upduino-projects - Various VHDL projects I've worked on for the Upduino v2.0 and v3.0

chipyard - An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

darkriscv - opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

lxp32-cpu - A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set

fpga-zynq - Support for Rocket Chip on Zynq FPGAs

linux-on-litex-rocket - Run 64-bit Linux on LiteX + RocketChip

serv - SERV - The SErial RISC-V CPU