livehd VS cpu11

Compare livehd vs cpu11 and see what are their differences.

livehd

Live Hardware Development (LiveHD), a productive infrastructure for Synthesis and Simulation (by masc-ucsc)

cpu11

Revengineered ancient PDP-11 CPUs, originals and clones (by 1801BM1)
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livehd cpu11
1 2
166 129
1.8% -
8.9 6.1
2 days ago 4 days ago
Verilog Verilog
GNU General Public License v3.0 or later GNU General Public License v3.0 or later
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.

livehd

Posts with mentions or reviews of livehd. We have used some of these posts to build our list of alternatives and similar projects.

We haven't tracked posts mentioning livehd yet.
Tracking mentions began in Dec 2020.

cpu11

Posts with mentions or reviews of cpu11. We have used some of these posts to build our list of alternatives and similar projects.

We haven't tracked posts mentioning cpu11 yet.
Tracking mentions began in Dec 2020.

What are some alternatives?

When comparing livehd and cpu11 you can also consider the following projects:

open-register-design-tool - Tool to generate register RTL, models, and docs using SystemRDL or JSpec input

hdl - HDL libraries and projects

PDP-11 - A collection of PDP-11 related files

riscv - RISC-V CPU Core (RV32IM)

open-fpga-verilog-tutorial - Learn how to design digital systems and synthesize them into an FPGA using only opensource tools

openlane - OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

serv - SERV - The SErial RISC-V CPU

zipcpu - A small, light weight, RISC CPU soft core

biriscv - 32-bit Superscalar RISC-V CPU