edalize VS sphinx-vhdl

Compare edalize vs sphinx-vhdl and see what are their differences.

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edalize sphinx-vhdl
4 1
590 19
- -
7.3 0.0
6 days ago over 1 year ago
Python Python
BSD 2-clause "Simplified" License BSD 3-clause "New" or "Revised" License
The number of mentions indicates the total number of mentions that we've tracked plus the number of user suggested alternatives.
Stars - the number of stars that a project has on GitHub. Growth - month over month growth in stars.
Activity is a relative number indicating how actively a project is being developed. Recent commits have higher weight than older ones.
For example, an activity of 9.0 indicates that a project is amongst the top 10% of the most actively developed projects that we are tracking.

edalize

Posts with mentions or reviews of edalize. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2023-02-06.
  • Dropping EDA-GUI's 101
    1 project | /r/FPGA | 17 Feb 2023
    Check out FuseSoC: https://github.com/olofk/fusesoc which can handle Vivado builds for you (utilizing edalize: https://github.com/olofk/edalize) along with some nice package management. It can run against multiple tools so you can also get it to build simulations using Verilator or a commercial EDA tool if you have access to them.
  • Introduction to FPGAs
    9 projects | news.ycombinator.com | 6 Feb 2023
    Check out https://github.com/olofk/fusesoc. It gives you a command line build flow that can drive Vivado (along with many other eda tools via edalize https://github.com/olofk/edalize) without having to touch the GUI (though you might want it for programming the board, though FuseSoC can do that too).
  • Compiling Code into Silicon
    10 projects | news.ycombinator.com | 7 Dec 2021
    This reminds me very much of edalize[1], which does something very similar.

    [1]: https://github.com/olofk/edalize

  • Olof Kindgren on LinkedIn: We have a new world record! 6000 RISC-V cores in a single chip!
    3 projects | /r/RISCV | 24 Sep 2021

sphinx-vhdl

Posts with mentions or reviews of sphinx-vhdl. We have used some of these posts to build our list of alternatives and similar projects. The last one was on 2022-02-01.
  • sphinx-vhdl: Automatic generation of documentation from VHDL
    2 projects | /r/FPGA | 1 Feb 2022
    A student on my team created an extension for Sphinx that allows you to generate documentation directly from comments in VHDL code. Do you know sphinx-vhdl yet? This extension is available as open-source on GitHub, and you can install it from PyPi. https://github.com/CESNET/sphinx-vhdl

What are some alternatives?

When comparing edalize and sphinx-vhdl you can also consider the following projects:

fusesoc - Package manager and build abstraction tool for FPGA/ASIC development

MyST-Parser - An extended commonmark compliant parser, with bridges to docutils/sphinx

skywater-pdk - Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

sphinx-revealjs - HTML Presentation builder for Pythonista

apio - :seedling: Open source ecosystem for open FPGA boards

VHDL-Issues

freepdk-45nm - ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen

sphinx-readme - Generate Beautiful reStructuredText README.rst for GitHub, PyPi, GitLab, BitBucket

icestudio - :snowflake: Visual editor for open FPGA boards

sphinxcontrib-hdl-diagrams - Sphinx Extension which generates various types of diagrams from Verilog code.

rggen - Code generation tool for control and status registers

opentitan - OpenTitan: Open source silicon root of trust